Warp Processors - cs.ucr.edu

Warp Processors - cs.ucr.edu

"Standard Binaries for FPGAs" & "eBlocks" Frank Vahid Professor Department of Computer Science and Engineering University of California, Riverside Associate Director, Center for Embedded Computer Systems, UC Irvine Work supported by the National Science Foundation, the Semiconductor Research Corporation, Xilinx, Intel, and Freescale Contributing Students: FPGAs: Roman Lysecky (PhD 2005, Asst. Prof. at U. Arizona), Greg Stitt (PhD 2007, Assistant Prof. at U. Florida), Ann Gordon-Ross (Ph.D. 2007, Asst. Prof. at U. Florida), David Sheldon (4th yr PhD), Scott Sirowy (3rd yr PhD) eBlocks: Susan Lysecky (PhD 2006, Asst. Prof. at U. Arizona), Ryan Mannion (3rd yr PhD), Shawn Nemetebakshi (MS 2005), plus numerous undergraduate students Software... Microprocessor instructions FPGA circuit s Software is no longer just "instructions" The elephant of software has a (new) tail FPGA circuits Frank Vahid, UC Rivers ide 2/31 FPGAs: The Quietly Arriving New Software FPGAs implement circuits as software bits downloaded into memory Circuit a a b F G 4x2 Memory a1 00 1 1 a0 01 1 0 1 1 10 0 0

LUT 11 d1 d0 F b 0 1 x 0 1 y SM 00 11 11 ... 01 FPGA SM SM 00 01 01 ... LUT 11 LUT 11 10 SM SM SM G FPGA Increasingly found in embedded system products medical devices, basestations, set-top boxes, etc. Frank Vahid, UC Rivers

ide 2006 Multi-billion dollar growing industry 1800 1600 1400 Xilinx 1200 Revenue 1000 (millions 800 600 of $) 400 200 0 2002 (Field-programmable gate array) thousands of LUTs and switch matrices, plus flip-flops, multipliers, RAMs, etc. Tools automatically compile circuits into bits that program FPGA 1998 a 11 01 1994 2x2 switch matrix1 0 b 3/31 Why Circuits (Sometimes) Beat Instructions C Code for FIR Filter for for (i=0; (i=0; ii < < 128; 128; i+ i+ +) +) y[i]

y[i] += += c[i] c[i] ** x[i] x[i] .... .... .... Circuit for FIR Filter * * * * * * * * * * * * + + + + + + + + + + + + Processor Processor 1000s of instructions Several thousand cycles FPGA Processor ~ 7 cycles Speedup > 100x general, FPGA better due to circuit's concurrency, from bit-level to task le Frank Vahid, UC Rivers ide 4/31 60

30 50 25 S p e ed u p S p eed u p Extensive Studies over Past Decade 40 30 500 200 79.2 20 15 10 20 5 10 0 0 Large speedups on many important applications Numerous dedicated conferences (FPGA, FCCM, FPL, ...) Frank Vahid, UC Rivers ide 5/31 New FPGA Compilers Start from Common Programming Languages C, C++, Java Binary FPGA Profiling Compiler

Binary Binary Microprocessor Frank Vahid, UC Rivers ide HDL Binary Synthesis Bitstream Binary Commercial products appearing in recent years Good news FPGA 6/31 Problem: Best Temporal/Spatial Algorithms Differ Algorithm quicksort( array, left, right){ if right > left: pivot= array[left] newpivot = partition(array, left, right, pivot) quicksort(array, left, newpivot -1) quicksort(array, newpivot + 1, right) Platform Processor Processor } Bitonic Sorting Network Frank Vahid, UC Rivers ide FPGA 7/31 Bigger Problem: Algorithms Matter Even More 13

12 11 10 S peedup 9 8 Quicksort 7 6 Bitonic Sort 5 4 3 2 1 0 Processor Processor FPGA For portability, need algorithms that are efficient on both "Compromise programming" Frank Vahid, UC Rivers ide 8/31 New FPGA Compilers Start from Common Programming Langauges C, C++, Java Binary FPGA Profiling Compiler Binary Binary Microprocessor

Bitstream Binary BUT Standard tools/binaries important for "ecosystem" Countless ideas failed for not respecting the ecosystem FPGA Languages Standard binary Tools Frank Vahid, UC Rivers ide Architectures 9/31 One Solution: Hide the FPGA SW Binary Standard Profiling Compiler Today's microprocessors use dynamic translation (e.g., x86) Binary Binary Translator Translator RISC architecture VLIW architecture For FPGAs: Transparently translate standard microprocessor binaries to FPGAs Translator Proc.

Frank Vahid, UC Rivers ide Different architectures hidden Warp Processing Developed at UCR 2002present FPGA 10/31 Warp Processing Background: Basic Idea 1 Initially, software binary loaded into instruction memory Profiler I Mem P D$ FPGA Frank Vahid, UC Rivers ide Software Binary Mov reg3, 0 Mov reg4, 0 loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 On-chip CAD 11/31 Warp Processing Background: Basic Idea 2 Microprocessor executes instructions in software binary Profiler I

Mem P D$ FPGA Frank Vahid, UC Rivers ide Software Binary Mov reg3, 0 Mov reg4, 0 loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy On-chip CAD 12/31 Warp Processing Background: Basic Idea 3 Profiler monitors instructions and detects critical regions in binary Profiler P be adbe adbe adbe adbe adbe adbe adbe adbe adbe ad q q q q q q q q

q q dddddddddd Mem D$ FPGA Frank Vahid, UC Rivers ide I On-chip CAD Software Binary Mov reg3, 0 Mov reg4, 0 loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy Critical Loop Detected 13/31 Warp Processing Background: Basic Idea 4 On-chip CAD reads in critical region Profiler I Mem P D$ FPGA Frank Vahid, UC Rivers ide Software Binary Mov reg3, 0 Mov reg4, 0

loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy On-chip CAD 14/31 Warp Processing Background: Basic Idea 5 On-chip CAD converts critical region into control data flow graph (CDFG) Profiler I Mem P D$ FPGA Dynamic Part. On-chip CAD Module (DPM) Software Binary Mov reg3, 0 Mov reg4, 0 loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy reg3 := 0 reg4 := 0 loop: reg4 := reg4 + mem[ reg2 + (reg3 << 1)] reg3 := reg3 + 1 if (reg3 < 10) goto loop ret reg4

Frank Vahid, UC Rivers ide 15/31 Warp Processing Background: Basic Idea 6 On-chip CAD synthesizes decompiled CDFG to a custom (parallel) circuit Profiler I Mem P D$ FPGA Dynamic Part. On-chip CAD Module (DPM) Software Binary Mov reg3, 0 Mov reg4, 0 loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy := 0 + + + reg3 + reg4 := 0+ + + + ... loop: reg4 := reg4+ + mem[ + reg2 + (reg3 << 1)] reg3 := reg3 + 1

. . loop if (reg3 +< 10). goto ret reg4 Frank Vahid, UC Rivers ide + ... 16/31 Warp Processing Background: Basic Idea 7 On-chip CAD maps circuit onto FPGA Profiler I Mem P D$ FPGA Dynamic Part. On-chip CAD Module (DPM) Software Binary Mov reg3, 0 Mov reg4, 0 loop: Shl reg1, reg3, 1 Add reg5, reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy := 0 + + + reg3 + reg4 := 0+ + SM SM . . . loop: reg4 :=+

reg4 + mem[ + CL + + CL + reg2 + (reg3 << 1)] B reg3 := B reg3 + 1 SM + SM . . loop if (reg3 goto +< 10).SM SM ret reg4 Frank Vahid, UC Rivers ide + ... 17/31 Warp Processing Background: Basic Idea 8 On-chip CAD replaces instructions in binary to use hardware, causing performance and energy to warp by an order of magnitude or more Profiler I Mem P D$ FPGA Dynamic Part. On-chip CAD Module (DPM) Feasible for repeating or longrunning applications Frank Vahid, UC Rivers ide Software Binary Mov reg3, 0 Mov reg4, 0

loop: // instructions Shl reg1, reg3, that 1 interact FPGA Add reg5,with reg2, reg1 Ld reg6, 0(reg5) Add reg4, reg4, reg6 Add reg3, reg3, 1 Beq reg3, 10, -5 Ret reg4 Time Energy Time Energy Softwareonly Warped := 0 + + + reg3 + reg4 := 0+ + SM SM . . . loop: reg4 :=+ reg4 + mem[ + CL + + CL + reg2 + (reg3 << 1)] B reg3 := B reg3 + 1 SM + SM . . loop if (reg3 goto +< 10).SM SM ret reg4 + ... 18/31

Recent Warp Results on Multi-Threaded Benchmarks After translation (may take minutes), huge speedups Even compared to 64-microprocessor system [ Stitt/Vahid CODES/ISSS 2007] Translation results remembered for later execution Frank Vahid, UC Rivers ide 19/31 FPGAs as Software: Challenges and Opportunity Challenge Broader definitions of... Compilation, OS, verification, certification, etc. Opportunity Can create custom multiprocessor architectures just by downloading bits After all, a processor is just another circuit Xilinx Virtex II Pro can hold dozens of "soft core" 32-bit processors, in addition to the four "hard core" PowerPCs Frank Vahid, UC Rivers ide 20/31 FPGAs and Cyber-Physical Systems Tough to predict future of computing "Victorian planners in 1830 predicted that by 1930 London street traffic would be bogged down under 25 feet of horse manure."

Are FPGAs to microprocessors what cars were to horses? Probably not, but perhaps they are what tails are to horses? We might do well to keep FPGAs in mind as we consider software issues Frank Vahid, UC Rivers ide 21/31 eBlocks: The Wood-and-Nails of the Electronic Sensor World Frank Vahid* Department of Computer Science and Engineering University of California, Riverside [email protected] http://www.cs.ucr.edu/~vahid * Also with the Center for Embedded Computer Systems at UC Irvine This work is being supported by the National Science Foundation Title suggested by a colleague: "eBlocks Empowering the People" Seen this Problem? Available Technology everywhere Why no good solution? Frank Vahid, UC Rivers ide Not! 23/31 Shrinking Processor Size/Cost Enables New Solution Courtesy of Joe Kahn http://www.templehealth.org Make sensors smarter By adding processor+battery Becomes a "block" easily connected to other blocks

Frank Vahid, UC Rivers ide 24/31 Shrinking Processor Size/Cost Enables New Solution eBlocks Existing component view New "eBlock" view yes/no Button Light Sensor yes/no Magnetic Contact Switch yes/no yes/no LED yes/no Beeper yes/no Electric Relay Frank Vahid, UC Rivers ide 25/31 eBlocks Just connect blocks, and they work No programming knowledge, no electronics knowledge Frank Vahid, UC Rivers ide Button yes/no Light Sensor

yes/no yes/no yes/no Beeper LED 26/31 What's Hard (The Research Part) (1) Finding right set of building blocks Too many Overwhelming (too much choice) Too few Overwhelming (too much configuration) Splitter Toggle 2-Input Logic Splitter Tripper 3-Input Logic 123456789 Splitter When A is 2 Prolong (short) When A is yes no AND B is OR Combine Frank Vahid, UC Rivers ide then the output is yes

4 5: Splitter Prolong (long) 6: ... 1 2 3 4 5 6 7 8 9 yes no then the output is yes AND B is OR yes no 3 123456789 4-Input Logic 123456789 1 2 Yes detector 2 No detector SuperBlock 27/31 What's Hard (The Research Part) (2) Making the blocks understandable A People NOT likely to read directions Co mbi ne Those that do are unlikely to understand

Performed extensive user testing (over 500 students, kids, and adults) over two years Example: Combine block B yes no: A is yes, B is yes A is yes, B is no A is no, B is yes A is no, B is no The output should be yes when: Phrased truth table A B no no yes yes no yes no yes yes no A B A is yes, B is yes When the A is yes, B is no the output input is A is no, B is yes should be A is no, B is no out Combine Output no no no no Logic Block yes yes

yes yes configurable DIP switch Phrased truth table embedded in sentence A When the A A input is A A yes no B B The output B B should be B out Combine Colored truth table embedded in sentence Most success When A is Frank Vahid, UC Rivers ide yes no AND B is yes no OR then the output is yes Combine Logic Sentence 28/31 What's Hard (The Research Part) (3) Batteries must last years, yet performance should appear continuous Blocks are off 99.9% of the time (a) time (b) f

Latency t f f 0.14 0.05 Block latency (seconds) Disconnect Responsiveness 1 1 0 0 1800600300 60 30 10 5 4 3 2 0.50 1 0.25 Freliability Flatency 0 730 365 1 ide < f Connect Responsiveness 0 Mean time between corrupted packets (days) error < f 1

0 Frank Vahid, UC Rivers error Fresponsiveness 1 interpreted as < Fresponsiveness Reliability (d) f < (c) Developed custom CAD tool to automatically find the best block parameter settings out of the billions of possibilities t Disconnect response (seconds) 600300 60 30 10 5 4 3 2 0.50 1 0.25 0.10 Developed theory to map eBlock events to continuous time Connect response (seconds) 29/31 eBlocks and Embedded Microprocessors Can greatly simplify coding Button

yes/no 1/0 Microprocessor Light Sensor Frank Vahid, UC Rivers ide yes/no 1/0 30/31 eBlocks Prototypes >100 prototypes, size of deck of cards (trend: smaller) 2-3 years on 2 AA batteries (trend: longer) Can communicate via wire >1.5 miles, 150 ft wireless Integer blocks too Early apps: hearing/vision impaired, ageing parents, middle-school projects Support for advanced users Frank Vahid, UC Rivers ide 31/31 eBlocks as a Programming Paradigm Use virtual blocks in graphical simulator to describe desired sensor system behavior Intuitive due to spatial emphasis, not temporal emphasis

Automatically compile to code on programmable eBlocks Partitions Frank Vahid, UC Rivers ide Programmable eBlocks 32/31 eBlock Tool Generates Code Tool generates C code automatically #include #include sci.h C Code main(void) { #include io.h ORTA = 0xff; #include constants.h CMCON = 0x07; Unsigned char data_val = ERROR; TRISA = 0x00; ... TRISB = 0x02; main(void) { asm("CLRWDT"); unsigned I, j; ... TRISB = 0; ... } Programmable eBlock }

Download code to block with click of a button Ordinary users can write programs in minutes Spatial vs. temporally-oriented language 20 high school graduates: eBlocks (spatial) vs. LEGO Mindstorms (temporal), 6 example systems, 40 minutes to build Frank Vahid, UC Rivers ide Type Average Success Rate Mindstorm s 0% 33/31 eBlocks 1998: Simple Problem No simple solution Off-the-shelf solutions costly, hard to find, and/or not customizable Alarm system cost overkill Connecting existing sensors, logic,

transmit/receive, LEDs is hard Garage door open at night Electronics, programming 2-week project: 70% EE/ CS unable Countless similar applications go unrealized Why can't I just connect those components like "LegoTM" blocks? Frank Vahid, UC Rivers ide transmit AND receive light sensor LED contact switch 34/31 eBlocks Example "Garage Open at Night" detector <10 minutes to build Light Sensor When A is Detect night-time use Light Sensor block Magnetic Contact Switch yes no AND B is OR

yes no then the output is yes LED Need to indicate garage open at night use LED block Combine Use Combine block to combine light sensor and contact switch into one Detect garage door open use Contact Switch block Plug pieces together and the system is done! Frank Vahid, UC Rivers ide 35/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Blocks added by dragging User is able to configure various blocks by clicking on switches Connections created by drawing lines between blocks User can create, experiment, test and configure

design Frank Vahid, UC Rivers ide Available eBlocks Sensor Outpu t s Light Sensor When A is Button Beeper Button Compute/ Communications yes no AND B is OR yes no then the output is yes When A is yes no AND B is OR yes no then the output is yes Combine Motion SensorCombine Green/Red Light Beeper rst Light Sensor Once Yes, Stays Yes

in Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. 36/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Available eBlocks Sensor Outpu t s When A is Button Beeper Compute/ Communications yes no AND B is OR

yes no then the output is yes Motion SensorCombine Green/Red Light rst Light Sensor Once Yes, Stays Yes in Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. Frank Vahid, UC Rivers ide 37/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Blocks added by dragging

Available eBlocks Sensor Outpu t s Button When A is Beeper Compute/ Communications yes no AND B is OR yes no then the output is yes Motion SensorCombine Green/Red Light rst Light Sensor Once Yes, Stays Yes in Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port.

Frank Vahid, UC Rivers ide 38/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Blocks added by dragging Available eBlocks Sensor Outpu t s Button When A is Button Beeper Compute/ Communications yes no AND B is OR yes no then the output is yes Motion SensorCombine Green/Red Light rst Light Sensor Once Yes, Stays Yes in

Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. Frank Vahid, UC Rivers ide 39/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Blocks added by dragging Available eBlocks Light Sensor Button Sensor Outpu t s When A is Button Beeper

Compute/ Communications yes no AND B is OR yes no then the output is yes Motion SensorCombine Green/Red Light rst Light Sensor Once Yes, Stays Yes in Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. Frank Vahid, UC Rivers ide 40/31 Graphical Simulator User specifies and tests block design

Java-based simulator User chooses between pallets Blocks added by dragging Available eBlocks Sensor Outpu t s Light Sensor When A is Button Beeper Button Compute/ Communications yes no AND B is OR yes no then the output is yes When A is yes no AND B is OR yes no Motion SensorCombine Green/Red Light rst then the output is yes Combine

Light Sensor Once Yes, Stays Yes in Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. Frank Vahid, UC Rivers ide 41/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Blocks added by dragging User is able to configure various blocks by clicking on switches Available eBlocks Sensor Outpu t

s Light Sensor When A is Button Beeper Button Compute/ Communications yes no AND B is OR yes no then the output is yes When A is yes no AND B is OR yes no then the output is yes Combine Motion SensorCombine Green/Red Light Beeper rst Light Sensor Once Yes, Stays Yes in Toggle Yes/No 123456789 seconds

Prolonger Hide this panel Advanced Mode Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. Frank Vahid, UC Rivers ide 42/31 Graphical Simulator User specifies and tests block design Java-based simulator User chooses between pallets Blocks added by dragging User is able to configure various blocks by clicking on switches Connections created by drawing lines between blocks Available eBlocks Sensor Outpu t s Light Sensor

When A is Button Beeper Button Compute/ Communications yes no AND B is OR yes no then the output is yes When A is yes no AND B is OR yes no then the output is yes Combine Motion SensorCombine Green/Red Light Beeper rst Light Sensor Once Yes, Stays Yes in Toggle Yes/No 123456789 seconds Prolonger Hide this panel Advanced Mode

Welcome to the eBlocks Simulator! In this area, youll find helpful hints on creating your own designs. Click and drag an eBlock off of the Available eBlocks panel to add it to your design. To connect two blocks, click and drag from an output port (colored circle) to an input port (gray circle). A connection can be destroyed by clicking on a connected port. To move a block around the workspace, click and drag its orange area. Blocks can be moved into the trash can to delete them. Green circles indicate that the port is sending a yes, red circles indicate that the port is sending a no, yellow Circles indicate that the port is sending an error signal, and gray circles denote an input port. Frank Vahid, UC Rivers ide 43/31

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